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This question will be due on 5/10/16 and about exercise-(Answered)

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This question will be due on 5/10/16 and about exercise


ET1220: Module 5 Using Counters And Memory

 

Exercise 5.1

 

Counters, Memory, and Storage

 


 

Answer the following questions:

 

1. What is the output frequency of each counter in the digital clock circuit of the figure given below?

 


 

2. Show how to connect a 4-bit asynchronous counter for each of the following moduli using clear

 

input:

 

a) 9

 

b) 11

 

c) 13

 

d) 14

 

e) 15

 

3. Show the complete timing diagram for the five-stage synchronous binary counter in the given

 

figure. Verify that the waveforms of the Q outputs represent the correct binary number after each

 

clock pulse.

 


 

1

 


 

ET1220: Module 5 Using Counters And Memory

 

Exercise 5.1

 

Counters, Memory, and Storage

 


 

4. Show a complete timing diagram for a 3-bit up/down counter that goes through the following

 

sequence. Indicate when the counter is in the UP or DOWN mode. Assume positive edge-triggering.

 

0, 1, 2, 3, 2, 1, 2, 3, 4, 5, 6, 5, 4, 3, 2, 1, 0

 

5. For each of the cascaded counter configurations in the figure below, determine the frequency of the

 

waveform at each point indicated by a circled number and then determine the overall modulus.

 


 

6. With general block diagrams, show how to obtain the following frequencies from a 10-MHz clock by

 

using single flip-flops, modulus-5 counters, and decade counters:

 

a) 5 MHz

 

b) 2.5 MHz

 

c) 2 MHz

 

d) 1 MHz

 

e) 500 kHz

 

f)

 


 

250 kHz

 


 

g) 62.5 kHz

 

h) 40 kHz

 

i)

 


 

10 kHz

 


 

j)

 


 

1 kHz

 


 

7. What comprises main memory?

 

8. Explain why RAMs and ROMs are both random- access memories.

 

9. Draw a basic logic diagram for a 512 X 8-bit static RAM, showing all inputs and outputs.

 

10. What is the capacity of a DRAM that has 12 address lines?

 


 

2

 


 

ET1220: Module 5 Using Counters And Memory

 

Exercise 5.1

 

Counters, Memory, and Storage

 


 

11. Determine the truth table for the ROM in the figure below.

 


 

12. Using a block diagram, show how 64k X 1 dynamic RAMs can be expanded to build a 256k X 4 RAM.

 

Submission Requirements:

 

Submit your answers in a Microsoft Word document. The submission should use:

 


 


 

Font: Arial; 12-point

 


 


 


 

Line spacing: Double

 


 

Evaluation Criteria:

 

Your submission will be evaluated against the following criteria:

 


 


 

Did you include appropriate steps or rationale to determine the answers to questions wherever

 

required?

 


 


 


 

Did you correctly answer each question?

 


 

3

 


 

 

Paper#9209548 | Written in 27-Jul-2016

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